pydynamicestimator.tests.test_recur_sim_inverter
================================================

.. py:module:: pydynamicestimator.tests.test_recur_sim_inverter

.. autoapi-nested-parse::

   Byte-identical SIM baseline gates for the inverter models (Phase 0).

   Exercise GridForming + GridFollowing (+ SGs) through the t=4.0 bus fault and
   compare the full state trajectory against the pickled references at atol=1e-6,
   for both network realizations:

   - ``test_sim_line_dyn``: ``line_dyn=True`` (ODE, cvodes) -- the primary gate.
   - ``test_sim_alg``:      ``line_dyn=False`` (algebraic network / DAE, idas) -- the
     distinct path the future LCL_static realization will exercise.

   Any change to inverter state count, ordering, or numerics fails these instantly --
   the gates every behavior-preserving step of the inverter refactor
   (docs/inverter_modernization_design.md) must keep green.



Functions
---------

.. autoapisummary::

   pydynamicestimator.tests.test_recur_sim_inverter._assert_matches
   pydynamicestimator.tests.test_recur_sim_inverter.test_sim_line_dyn
   pydynamicestimator.tests.test_recur_sim_inverter.test_sim_alg


Module Contents
---------------

.. py:function:: _assert_matches(case: str, atol: float) -> None

.. py:function:: test_sim_line_dyn()

.. py:function:: test_sim_alg()